Power converters are generally used to power many of electronic devices. The pulse-width modulation (PWM) technique is a conventional technique used in a power converter to control and regulate the output power. Various protection functions are built-in in the power converter to protect the power converter from permanent damage. The function of compensating the maximum output power is commonly used for overload and short-circuit protections.
FIG. 1 shows a traditional power converter. The power converter includes a power transformer T1 having a primary winding NP and a secondary winding NS. The power transformer T1 is to provide galvanic isolation between AC line input and an output of the power converter for safety. The primary winding NP is supplied with an input voltage VIN of the power converter. In order to regulate an output voltage VO of the power converter, a control circuit coupled in series with the primary winding NP of the power transformer T1 generates a PWM signal VPWM in response to a feedback signal VFB. The control circuit comprises an oscillator 10, a first comparator 31, a second comparator 32, a logic circuit 33, and a flip-flop 20. The PWM signal VPWM controls a power switch Q1 to switch the power transformer T1. A current-sense resistor RS is connected in series with the power switch Q1 to determine the maximum output power of the power converter. The current-sense resistor RS turns the switching current of the power transformer T1 into a current-sense signal VS. The current-sense signal VS is coupled to the control circuit. If the current-sense signal VS is greater than a maximum threshold VM through the first comparator 31, the control circuit is coupled to disable the PWM signal VPWM, and it also restricts the maximum output power of the power converter.
FIG. 2 shows the signal waveforms of the PWM signal VPWM and the current-sense signal VS of the power converter in FIG. 1. As the PWM signal VPWM becomes logic-high, a primary-side switching current IP will be generated accordingly. A peak value IP1 of the primary-side switching current IP can be given by,
                              I                      P            ⁢                                                  ⁢            1                          =                                            V              IN                                      L              P                                ×                      T            ON                                              (        1        )            The maximum output power PO can be expressed by,
                              P          O                =                                                            L                P                                            2                ×                                  T                  S                                                      ×                          I                              P                ⁢                                                                  ⁢                1                            2                                =                                                    V                IN                2                            ×                              T                ON                2                                                    2              ×                              L                P                            ×                              T                S                                                                        (        2        )            
In Equations (1) and (2), LP is the inductance of the primary winding NP of the transformer T1, TON is an on-time of the PWM signal VPWM while the power switch Q1 is switched on, and TS is the switching period of the PWM signal VPWM.
From Equation (2), we find that the output power varies as the input voltage VIN varies. The input voltage VIN ranges between 90VAC and 264VAC when the safety regulations are taken into consideration, and wherein the power limit in a high line voltage is many times higher than the power limit in a low line voltage. There is a delay time TD from the moment when the voltage in current-sense signal VS is higher than the maximum threshold VM to the moment when the PWM signal VPWM is actually turned off. The maximum output power PO is also affected by the delay time TD of the control circuit. In the period of the delay time TD, the power switch Q1 is still turned on, and keeps on-state for delivering the output power. Therefore, the actual on-time of the PWM signal VPWM is equal to TON+TD, and the actual maximum output power PO becomes as follows:
                              P          O                =                                            V              IN              2                        ×                                          (                                                      T                    ON                                    +                                      T                    D                                                  )                            2                                            2            ×                          L              P                        ×                          T              S                                                          (        3        )            
Although the delay time TD is short, generally within the range of 200 nsec˜350 nsec, the higher the operating frequency and smaller the switching period TS become, the more influential impact is caused by the delay time TD. Therefore, the input voltage VIN should be compensated properly, such that the input voltage VIN does not affect the maximum output power.